Questions, answers, knowledge PSK/QPSK decoder using GODIL

What's the meaning of the symbols on the 3-digit display

• See: display info.

How does the GODIL lock to the incoming bitstream?

• This is done in 2 steps:
  • Bit synchronisation: this is equal to VCO lock. Needed to catch incoming bits eactly one by one.
  • Frame synchronisation: the bitstream is divided in blocks of equal length. Each block starts with a fixed bit-pattern. The decoder needs to recognize this to be able to determine which bits belong to which byte/word, and to recognize the start of each block.
• Without bit synchronisation frame synchronisation isn't possible.

How does the VCO lock (bit synchronisation)?

• The digital input at GODIL pin D3 is used. This is also the case for QPSK (D3 is 'I' input); the Q input (B4) isn't used at all for synchronisation. It is necessary that I and Q are in-line, i.e., equal delay, within ~100 ns (small part of 500 ns bit-rate).

How is frame synchronisation done?

• This is done by searching for the synchronisation pattern. If found, this is marked as start-of-frame. This info is also sent to the software, so frame synchronisation isn't necessary in software.

  For QPSK, both I and Q are necessary. I and Q may not be swapped; bit-synchronisation will be done (at the Q signal) but no framing pattern will be recognized.

  (Note that before frame-sync. Viterbi-decoding is done. If I and Q are swapped the output of this decoder is rubbish!)

How are the 2 synchronisation states shown?

• Bit-synchronisation=VCO lock: the middle digit of the 3-digit display.
  Note that the lock indication is not perfect for noisy signals!
• Frame synchronisation: the left digit.

How to adjust the vco?

• Use of a VCXO is possible and recommended; then no adjustment is needed.
• The generators give accurate bitrates and can be used to adjust the VCO if no VCXO is used.

• Use of VCXO is not possible; the LC-VCO is needed. Use the C-trimmer (4-30 pF):
  • Connect generator output to decoder input; set decoder in hrpt-mode.
  • Adjust the trimmer, VCO lock is shown with the middle display; see display info
    • If segment 'a' (top-horizontal segment) is 'on' then VCO freq. is too high.
    • If segment 'd' (bottom-horizontal segment) is 'on' then VCO freq. is too low.
    • both off: PLL is in-lock.
  Make sure that while adjusting you can get both 'too high' and 'too low' vco frequency, without getting to the edge of the trimmer.
  If necessary, place an extra C parallel to the trimmer (if you cannot get VCO low enough).
• NOTE that the bit-rate of the generator is not exact, so re-adjust on real signal is necessary. With the newest FPGA load this should be good enough for all satellites.